A 90-nm wideband merged CMOS LNA and mixer exploiting noise cancellation
Amer, Ahmed; Hegazi, Emad; Ragaie, Hani F.;
Abstract
This paper describes the design and implementation of a wideband merged LNA and mixer chip covering the frequency range from 0.1 to 3.85 GHz using 90-nm CMOS technology. Its high level of integration as well as its low power consumption makes it suitable for the rapidly growing software defined radio RF receivers. The chip performance achieves S11 below - 10 dB along the entire band and a minimum single side band noise figure of 8.4 dB at IF frequency of 70 MHz. Power conversion gain is measured to be 12.1 dB while the input referred 1 dB compression point is measured to be -12.8 dBm. The chip core consumes only 9.8 mW from a 1.2 V supply with a die area, including the pads, of 0.88 mm 2. © 2007 IEEE.
Other data
Title | A 90-nm wideband merged CMOS LNA and mixer exploiting noise cancellation | Authors | Amer, Ahmed; Hegazi, Emad ; Ragaie, Hani F. | Keywords | Low noise | Merged LNA and mixer | Multi-standard | Noise cancellation | Software defined radio | Wideband receiver | Issue Date | 1-Feb-2007 | Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | Journal | IEEE Journal of Solid-State Circuits | ISSN | 00189200 | DOI | 10.1109/JSSC.2006.889374 | Scopus ID | 2-s2.0-33847699391 | Web of science ID | WOS:000243915300008 |
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